io6Library
WIZnet Dual Stack TCP/IP Ethernet Controller Driver
wizchip_conf.c
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1 //* ****************************************************************************
31 //*****************************************************************************
32 
33 #include <stddef.h> // for use the type - ptrdiff_t
34 
35 
36 #include "wizchip_conf.h"
37 
45 void wizchip_cris_enter(void) {}
46 
54 void wizchip_cris_exit(void) {}
55 
63 void wizchip_cs_select(void) {}
64 
72 void wizchip_cs_deselect(void) {}
73 
74 
76 #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_)
77 
87 iodata_t wizchip_bus_read(uint32_t AddrSel) { return * ((volatile iodata_t *)((ptrdiff_t) AddrSel)); }
88 
98 void wizchip_bus_write(uint32_t AddrSel, iodata_t wb) { *((volatile iodata_t*)((ptrdiff_t)AddrSel)) = wb; }
99 
113 void wizchip_bus_read_buf(uint32_t AddrSel, iodata_t* buf, datasize_t len, uint8_t addrinc)
114 {
115  datasize_t i;
116  if(addrinc) addrinc = sizeof(iodata_t);
117  for ( i = 0; i < len; i++)
118  {
119  *buf++ = WIZCHIP.IF.BUS._read_data(AddrSel);
120  AddrSel += (uint32_t) addrinc;
121  }
122 }
123 
137 void wizchip_bus_write_buf(uint32_t AddrSel, iodata_t* buf, datasize_t len, uint8_t addrinc)
138 {
139  datasize_t i;
140  if(addrinc) addrinc = sizeof(iodata_t);
141  for( i = 0; i < len ; i++)
142  {
143  WIZCHIP.IF.BUS._write_data(AddrSel,*buf++);
144  AddrSel += (uint32_t)addrinc;
145  }
146 
147 }
148 
150 #endif
151 
153 
155 #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_)
156 
165 uint8_t wizchip_spi_read(void) {return 0;}
166 
175 void wizchip_spi_write(uint8_t wb) {}
176 
186 void wizchip_spi_read_buf(uint8_t* buf, datasize_t len)
187 {
188  for(datasize_t i=0; i < len; i++) *buf++ = WIZCHIP.IF.SPI._read_byte();
189 }
190 
200 void wizchip_spi_write_buf(uint8_t* buf, datasize_t len)
201 {
202  for(datasize_t i=0; i < len; i++) WIZCHIP.IF.SPI._write_byte(*buf++);
203 }
204 
206 #endif
207 
209 
214 _WIZCHIP_T_ WIZCHIP =
215 {
216  _WIZCHIP_IO_MODE_,
217  _WIZCHIP_ID_ ,
218  {
219  wizchip_cris_enter,
220  wizchip_cris_exit
221  },
222  {
223  wizchip_cs_select,
224  wizchip_cs_deselect
225  },
226 #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_)
227  {
228  .BUS =
229  {
230  wizchip_bus_read,
231  wizchip_bus_write,
232  wizchip_bus_read_buf,
233  wizchip_bus_write_buf
234  }
235  }
236 #elif (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_)
237  {
238  .SPI =
239  {
240  wizchip_spi_read,
241  wizchip_spi_write,
242  wizchip_spi_read_buf,
243  wizchip_spi_write_buf
244  }
245  }
246 #else
247  #error "Undefined _WIZCHIP_IO_MODE_. You should define it"
248 #endif
249 };
250 
251 
252 static uint8_t _DNS_[4];
253 static uint8_t _DNS6_[16];
254 static ipconf_mode _IPMODE_;
255 
256 void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
257 {
258  if(!cris_en) WIZCHIP.CRIS._e_n_t_e_r_ = wizchip_cris_enter;
259  else WIZCHIP.CRIS._e_n_t_e_r_ = cris_en;
260  if(!cris_ex) WIZCHIP.CRIS._e_x_i_t_ = wizchip_cris_exit;
261  else WIZCHIP.CRIS._e_x_i_t_ = cris_ex;
262 }
263 
264 void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
265 {
266  if(!cs_sel) WIZCHIP.CS._s_e_l_e_c_t_ = wizchip_cs_select;
267  else WIZCHIP.CS._s_e_l_e_c_t_ = cs_sel;
268  if(!cs_desel) WIZCHIP.CS._d_e_s_e_l_e_c_t_ = wizchip_cs_deselect;
269  else WIZCHIP.CS._d_e_s_e_l_e_c_t_ = cs_desel;
270 }
271 
272 #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_)
273 void reg_wizchip_bus_cbfunc( iodata_t(*bus_rd)(uint32_t addr),
274  void (*bus_wd)(uint32_t addr, iodata_t wb),
275  void (*bus_rbuf)(uint32_t AddrSel, uint8_t* buf, datasize_t len, uint8_t inc),
276  void (*bus_wbuf)(uint32_t AddrSel, uint8_t* buf, datasize_t len, uint8_t inc) )
277 {
278  while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
279  if(!bus_rd) WIZCHIP.IF.BUS._read_data = wizchip_bus_read;
280  else WIZCHIP.IF.BUS._read_data = bus_rd;
281  if(!bus_wd) WIZCHIP.IF.BUS._write_data = wizchip_bus_write;
282  else WIZCHIP.IF.BUS._write_data = bus_wd;
283 
284  if(!bus_rbuf) WIZCHIP.IF.BUS._read_data_buf = wizchip_bus_read_buf;
285  else WIZCHIP.IF.BUS._read_data_buf = bus_rbuf;
286  if(!bus_wbuf) WIZCHIP.IF.BUS._write_data_buf = wizchip_bus_write_buf;
287  else WIZCHIP.IF.BUS._write_data_buf = bus_wbuf;
288 }
289 #endif
290 
291 
292 
293 #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_)
294 void reg_wizchip_spi_cbfunc( uint8_t (*spi_rb)(void),
295  void (*spi_wb)(uint8_t wb),
296  void (*spi_rbuf)(uint8_t* buf, datasize_t len),
297  void (*spi_wbuf)(uint8_t* buf, datasize_t len) )
298 {
299  while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
300 
301  if(!spi_rb) WIZCHIP.IF.SPI._read_byte = wizchip_spi_read;
302  else WIZCHIP.IF.SPI._read_byte = spi_rb;
303  if(!spi_wb) WIZCHIP.IF.SPI._write_byte = wizchip_spi_write;
304  else WIZCHIP.IF.SPI._write_byte = spi_wb;
305 
306  if(!spi_rbuf) WIZCHIP.IF.SPI._read_byte_buf = wizchip_spi_read_buf;
307  else WIZCHIP.IF.SPI._read_byte_buf = spi_rbuf;
308  if(!spi_wbuf) WIZCHIP.IF.SPI._write_byte_buf = wizchip_spi_write_buf;
309  else WIZCHIP.IF.SPI._write_byte_buf = spi_wbuf;
310 }
311 #endif
312 
313 int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
314 {
315  uint8_t tmp = *(uint8_t*) arg;
316 
317  uint8_t* ptmp[2] = {0,0};
318  switch(cwtype)
319  {
320  case CW_SYS_LOCK:
321  if(tmp & SYS_CHIP_LOCK) CHIPLOCK();
322  if(tmp & SYS_NET_LOCK) NETLOCK();
323  if(tmp & SYS_PHY_LOCK) PHYLOCK();
324  break;
325  case CW_SYS_UNLOCK:
326  if(tmp & SYS_CHIP_LOCK) CHIPUNLOCK();
327  if(tmp & SYS_NET_LOCK) NETUNLOCK();
328  if(tmp & SYS_PHY_LOCK) PHYUNLOCK();
329  break;
330  case CW_GET_SYSLOCK:
331  *(uint8_t*)arg = getSYSR() >> 5;
332  break;
333  case CW_RESET_WIZCHIP:
334  wizchip_sw_reset();
335  break;
336  case CW_INIT_WIZCHIP:
337  if(arg != 0)
338  {
339  ptmp[0] = (uint8_t*)arg;
340  ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
341  }
342  return wizchip_init(ptmp[0], ptmp[1]);
343  case CW_GET_INTERRUPT:
344  *(intr_kind*)arg = wizchip_getinterrupt();
345  break;
346  case CW_CLR_INTERRUPT:
347  wizchip_clrinterrupt(*(intr_kind*)arg);
348  break;
349  case CW_SET_INTRMASK:
350  wizchip_setinterruptmask(*(intr_kind*)arg);
351  break;
352  case CW_GET_INTRMASK:
353  *(intr_kind*)arg = wizchip_getinterruptmask();
354  break;
355  case CW_SET_INTRTIME:
356  setINTPTMR(*(uint16_t*)arg);
357  break;
358  case CW_GET_INTRTIME:
359  *(uint16_t*)arg = getINTPTMR();
360  break;
361  case CW_SET_IEN:
362  tmp = getSYCR1();
363  if(*(uint8_t*)arg == 1) setSYCR1(tmp | SYCR1_IEN);
364  else setSYCR1(tmp & ~SYCR1_IEN);
365  break;
366  case CW_GET_IEN:
367  *((uint8_t*)arg) = getSYCR1() >> 7;
368  break;
369  case CW_GET_ID:
370  ((uint8_t*)arg)[0] = WIZCHIP.id[0];
371  ((uint8_t*)arg)[1] = WIZCHIP.id[1];
372  ((uint8_t*)arg)[2] = WIZCHIP.id[2];
373  ((uint8_t*)arg)[3] = WIZCHIP.id[3];
374  ((uint8_t*)arg)[4] = WIZCHIP.id[4];
375  ((uint8_t*)arg)[5] = 0;
376  break;
377  case CW_GET_VER:
378  *(uint16_t*)arg = getVER();
379  break;
380  case CW_SET_SYSCLK:
381  tmp = getSYCR1();
382  if(*(uint8_t*)arg == SYSCLK_100MHZ) setSYCR1(tmp & ~SYCR1_CLKSEL);
383  else if(*(uint8_t*)arg == SYSCLK_25MHZ) setSYCR1(tmp | SYCR1_CLKSEL);
384  break;
385  case CW_GET_SYSCLK:
386  *(uint8_t*)arg = (getSYCR1() & SYCR1_CLKSEL);
387  break;
388  case CW_RESET_PHY:
389  wizphy_reset();
390  break;
391  case CW_SET_PHYCONF:
392  wizphy_setphyconf((wiz_PhyConf*)arg);
393  break;
394  case CW_GET_PHYCONF:
395  wizphy_getphyconf((wiz_PhyConf*)arg);
396  break;
397  case CW_GET_PHYSTATUS:
398  wizphy_getphystatus((wiz_PhyConf*)arg);
399  break;
400  case CW_SET_PHYPOWMODE:
401  wizphy_setphypmode(tmp);
402  break;
403  case CW_GET_PHYPOWMODE:
404  *(uint8_t*)arg = wizphy_getphypmode();
405  break;
406  case CW_GET_PHYLINK:
407  *(uint8_t*)arg = wizphy_getphylink();
408  break;
409  default:
410  return -1;
411  }
412  return 0;
413 }
414 
415 int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
416 {
417  switch(cntype)
418  {
419  case CN_SET_NETINFO:
420  wizchip_setnetinfo((wiz_NetInfo*)arg);
421  break;
422  case CN_GET_NETINFO:
423  wizchip_getnetinfo((wiz_NetInfo*)arg);
424  break;
425  case CN_SET_NETMODE:
426  wizchip_setnetmode(*(netmode_type*)arg);
427  break;
428  case CN_GET_NETMODE:
429  *(netmode_type*)arg = wizchip_getnetmode();
430  break;
431  case CN_SET_TIMEOUT:
432  wizchip_settimeout((wiz_NetTimeout*)arg);
433  break;
434  case CN_GET_TIMEOUT:
435  wizchip_gettimeout((wiz_NetTimeout*)arg);
436  break;
437  case CN_SET_PREFER:
438  setSLPSR(*(uint8_t*)arg);
439  break;
440  case CN_GET_PREFER:
441  *(uint8_t*)arg= getSLPSR();
442  break;
443  default:
444  return -1;
445  }
446  return 0;
447 }
448 
449 int8_t ctlnetservice(ctlnetservice_type cnstype, void* arg)
450 {
451  switch(cnstype)
452  {
453  case CNS_ARP:
454  return wizchip_arp((wiz_ARP*)arg);
455  case CNS_PING:
456  return wizchip_ping((wiz_PING*)arg);
457  case CNS_DAD:
458  return wizchip_dad((uint8_t*)arg);
459  case CNS_SLAAC:
460  return wizchip_slaac((wiz_Prefix*)arg);
461  case CNS_UNSOL_NA:
462  return wizchip_unsolicited();
463  case CNS_GET_PREFIX:
464  return wizchip_getprefix((wiz_Prefix*)arg);
465  default:
466  return -1;
467  break;
468  }
469 }
470 
471 void wizchip_sw_reset(void)
472 {
473  uint8_t gw[4], sn[4], sip[4], gw6[16], sn6[16], lla[16], gua[16];
474  uint8_t mac[6];
475  uint8_t islock = getSYSR();
476 
477  CHIPUNLOCK();
478 
479  getSHAR(mac);
480  getGAR(gw); getSUBR(sn); getSIPR(sip); getGA6R(gw6); getSUB6R(sn6); getLLAR(lla); getGUAR(gua);
481  setSYCR0(SYCR0_RST);
482  getSYCR0(); // for delay
483 
484  NETUNLOCK();
485 
486  setSHAR(mac);
487  setGAR(gw);
488  setSUBR(sn);
489  setSIPR(sip);
490  setGA6R(gw6);
491  setSUB6R(sn6);
492  setLLAR(lla);
493  setGUAR(gua);
494  if(islock & SYSR_CHPL) CHIPLOCK();
495  if(islock & SYSR_NETL) NETLOCK();
496 }
497 
498 int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
499 {
500  int8_t i;
501  int8_t tmp = 0;
502  wizchip_sw_reset();
503  if(txsize)
504  {
505  tmp = 0;
506  for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
507  {
508  tmp += txsize[i];
509  if(tmp > 2*_WIZCHIP_SOCK_NUM_) return -1;
510  }
511  for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) setSn_TXBUF_SIZE(i, txsize[i]);
512  }
513  if(rxsize)
514  {
515  tmp = 0;
516  for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
517  {
518  tmp += rxsize[i];
519  if(tmp > 2*_WIZCHIP_SOCK_NUM_) return -1;
520  }
521  for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) setSn_RXBUF_SIZE(i, rxsize[i]);
522  }
523  return 0;
524 }
525 
526 void wizchip_clrinterrupt(intr_kind intr)
527 {
528  int i;
529  uint8_t ir = (uint8_t)intr;
530  uint8_t sir = (uint8_t)((uint32_t)intr >> 8);
531  uint8_t slir = (uint8_t)((uint32_t)intr >> 16);
532  setIRCLR(ir);
533  for(i=0; i<_WIZCHIP_SOCK_NUM_; i++)
534  {
535  if(sir&(1<<i)) setSn_IRCLR(i,0xFF);
536  }
537  setSLIRCLR(slir);
538 }
539 
540 intr_kind wizchip_getinterrupt(void)
541 {
542  uint32_t ret;
543  ret = (((uint32_t)getSLIR())<<16) | (((uint32_t)getSIR())<<8) | (((uint32_t)getIR()));
544  return (intr_kind)ret;
545 }
546 
547 void wizchip_setinterruptmask(intr_kind intr)
548 {
549  uint8_t imr = (uint8_t)intr;
550  uint8_t simr = (uint8_t)((uint32_t)intr >> 8);
551  uint8_t slimr = (uint8_t)((uint32_t)intr >> 16);
552  setIMR(imr);
553  setSIMR(simr);
554  setSLIMR(slimr);
555 }
556 
557 intr_kind wizchip_getinterruptmask(void)
558 {
559  uint32_t ret;
560  ret = (((uint32_t)getSLIMR())<<16) | (((uint32_t)getSIMR())<<8) | (((uint32_t)getIMR()));
561  return (intr_kind)ret;
562 }
563 
564 int8_t wizphy_getphylink(void)
565 {
566 #if (_PHY_IO_MODE_ == _PHY_IO_MODE_PHYCR_)
567  return (getPHYSR() & PHYSR_LNK);
568 #elif (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
569  if(wiz_mdio_read(PHYRAR_BMSR) & BMSR_LINK_STATUS) return PHY_LINK_ON;
570  return PHY_LINK_OFF;
571 #endif
572 }
573 
574 void wizphy_reset(void)
575 {
576 #if (_PHY_IO_MODE_ == _PHY_IO_MODE_PHYCR_)
577  uint8_t tmp = getPHYCR1() | PHYCR1_RST;
578  PHYUNLOCK();
579  setPHYCR1(tmp);
580  PHYLOCK();
581 #elif (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
582  wiz_mdio_write(PHYRAR_BMCR, wiz_mdio_read(PHYRAR_BMCR) | BMCR_RST);
583  while(wiz_mdio_read(PHYRAR_BMCR) & BMCR_RST);
584 #endif
585 }
586 
587 void wizphy_setphyconf(wiz_PhyConf* phyconf)
588 {
589 #if (_PHY_IO_MODE_ == _PHY_IO_MODE_PHYCR_)
590  uint8_t tmp = 0;
591  if(phyconf->mode == PHY_MODE_TE)
592  {
593  setPHYCR1(getPHYCR1() | PHYCR1_TE);
594  tmp = PHYCR0_AUTO;
595  }
596  else
597  {
598  setPHYCR1(getPHYCR1() & ~PHYCR1_TE);
599  if(phyconf->mode == PHY_MODE_AUTONEGO) tmp = PHYCR0_AUTO;
600  else
601  {
602  tmp |= 0x04;
603  if(phyconf->speed == PHY_SPEED_10) tmp |= 0x02;
604  if(phyconf->duplex == PHY_DUPLEX_HALF) tmp |= 0x01;
605  }
606  }
607  setPHYCR0(tmp);
608 #elif (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
609  uint16_t tmp = wiz_mdio_read(PHYRAR_BMCR);
610  if(phyconf->mode == PHY_MODE_TE)
611  {
612  setPHYCR1(getPHYC1R() | PHYCR1_TE);
613  setPHYCR0(PHYCR0_AUTO);
614  }
615  else
616  {
617  setPHYCR1(getPHYC1R() & ~PHYCR1_TE);
618  if(phyconf->mode == PHY_MODE_AUTONEGO) tmp |= BMCR_ANE;
619  else
620  {
621  tmp &= ~(BMCR_ANE|BMCR_DPX|BMCR_SPD);
622  if(phyconf->duplex == PHY_DUPLEX_FULL) tmp |= BMCR_DPX;
623  if(phyconf->speed == PHY_SPEED_100) tmp |= BMCR_SPD;
624  }
625  wiz_mdio_write(PHYRAR_BMCR, tmp);
626  }
627 #endif
628 }
629 
630 void wizphy_getphyconf(wiz_PhyConf* phyconf)
631 {
632 #if (_PHY_IO_MODE_ == _PHY_IO_MODE_PHYCR_)
633  uint8_t tmp = 0;
634  tmp = getPHYSR();
635  if(getPHYCR1() & PHYCR1_TE) phyconf->mode = PHY_MODE_TE;
636  else phyconf->mode = (tmp & (1<<5)) ? PHY_MODE_MANUAL : PHY_MODE_AUTONEGO ;
637  phyconf->speed = (tmp & (1<<4)) ? PHY_SPEED_10 : PHY_SPEED_100;
638  phyconf->duplex = (tmp & (1<<3)) ? PHY_DUPLEX_HALF : PHY_DUPLEX_FULL;
639 #elif (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
640  uint16_t tmp = 0;
641  tmp = wiz_mdio_read(PHYRAR_BMCR);
642  if(getPHYCR1() & PHYCR1_TE) phyconf->mode = PHY_MODE_TE;
643  else phyconf->mode = (tmp & BMCR_ANE) ? PHY_MODE_AUTONEGO : PHY_MODE_MANUAL;
644  phyconf->duplex = (tmp & BMCR_DPX) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
645  phyconf->speed = (tmp & BMCR_SPD) ? PHY_SPEED_100 : PHY_SPEED_10;
646 #endif
647 }
648 
649 void wizphy_getphystatus(wiz_PhyConf* phyconf)
650 {
651  uint8_t tmp = 0;
652  tmp = getPHYSR();
653  if(getPHYCR1() & PHYCR1_TE) phyconf->mode = PHY_MODE_TE;
654  else phyconf->mode = (tmp & (1<<5)) ? PHY_MODE_MANUAL : PHY_MODE_AUTONEGO ;
655  phyconf->speed = (tmp & PHYSR_SPD) ? PHY_SPEED_10 : PHY_SPEED_100;
656  phyconf->duplex = (tmp & PHYSR_DPX) ? PHY_DUPLEX_HALF : PHY_DUPLEX_FULL;
657 }
658 
659 void wizphy_setphypmode(uint8_t pmode)
660 {
661 #if (_PHY_IO_MODE_ == _PHY_IO_MODE_PHYCR_)
662  uint8_t tmp = getPHYCR1();
663  if (pmode == PHY_POWER_DOWN) tmp |= PHYCR1_PWDN;
664  else tmp &= ~PHYCR1_PWDN;
665  setPHYCR1(tmp);
666 #elif (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
667  uint16_t tmp = 0;
668  tmp = wiz_mdio_read(PHYRAR_BMCR);
669  if (pmode == PHY_POWER_DOWN) tmp |= BMCR_PWDN;
670  else tmp &= ~BMCR_PWDN;
671  wiz_mdio_write(PHYRAR_BMCR, tmp);
672 #endif
673 }
674 
675 int8_t wizphy_getphypmode(void)
676 {
677 #if (_PHY_IO_MODE_ == _PHY_IO_MODE_PHYCR_)
678  if (getPHYCR1() & PHYCR1_PWDN) return PHY_POWER_DOWN;
679 #elif (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
680  if (wiz_mdio_read(PHYRAR_BMCR) & BMCR_PWDN) return PHY_POWER_DOWN;
681 #endif
682  return PHY_POWER_NORM;
683 }
684 
685 void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
686 {
687  uint8_t i=0;
688  setSHAR(pnetinfo->mac);
689  setGAR(pnetinfo->gw);
690  setSUBR(pnetinfo->sn);
691  setSIPR(pnetinfo->ip);
692  setGA6R(pnetinfo->gw6);
693  setSUB6R(pnetinfo->sn6);
694  setLLAR(pnetinfo->lla);
695  setGUAR(pnetinfo->gua);
696 
697  for(i=0; i<4; i++) _DNS_[i] = pnetinfo->dns[i];
698  for(i=0; i<16; i++) _DNS6_[i] = pnetinfo->dns6[i];
699 
700  _IPMODE_ = pnetinfo->ipmode;
701 }
702 
703 void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
704 {
705  uint8_t i = 0;
706  getSHAR(pnetinfo->mac);
707 
708  getGAR(pnetinfo->gw);
709  getSUBR(pnetinfo->sn);
710  getSIPR(pnetinfo->ip);
711 
712  getGA6R(pnetinfo->gw6);
713  getSUB6R(pnetinfo->sn6);
714  getLLAR(pnetinfo->lla);
715  getGUAR(pnetinfo->gua);
716  for(i=0; i<4; i++) pnetinfo->dns[i] = _DNS_[i];
717  for(i=0; i<16; i++) pnetinfo->dns6[i] = _DNS6_[i];
718 
719  pnetinfo->ipmode = _IPMODE_;
720 }
721 
722 void wizchip_setnetmode(netmode_type netmode)
723 {
724  uint32_t tmp = (uint32_t) netmode;
725  setNETMR ((uint8_t)tmp);
726  setNETMR2((uint8_t)(tmp>>8));
727  setNET4MR((uint8_t)(tmp>>16));
728  setNET6MR((uint8_t)(tmp>>24));
729 }
730 
731 netmode_type wizchip_getnetmode(void)
732 {
733  uint32_t ret = 0;
734  ret = getNETMR();
735  ret = (ret << 8) + getNETMR2();
736  ret = (ret << 16) + getNET4MR();
737  ret = (ret << 24) + getNET6MR();
738  return (netmode_type)ret;
739 }
740 
741 void wizchip_settimeout(wiz_NetTimeout* nettime)
742 {
743  setRCR(nettime->s_retry_cnt);
744  setRTR(nettime->s_time_100us);
745  setSLRCR(nettime->sl_retry_cnt);
746  setSLRTR(nettime->sl_time_100us);
747 }
748 
749 void wizchip_gettimeout(wiz_NetTimeout* nettime)
750 {
751  nettime->s_retry_cnt = getRCR();
752  nettime->s_time_100us = getRTR();
753  nettime->sl_retry_cnt = getSLRCR();
754  nettime->sl_time_100us = getSLRTR();
755 }
756 
757 int8_t wizchip_arp(wiz_ARP* arp)
758 {
759  uint8_t tmp;
760  if(arp->destinfo.len == 16)
761  {
762  setSLDIP6R(arp->destinfo.ip);
763  setSLCR(SLCR_ARP6);
764  }
765  else
766  {
767  setSLDIP4R(arp->destinfo.ip);
768  setSLCR(SLCR_ARP4);
769  }
770  while(getSLCR());
771  while((tmp = getSLIR()) == 0x00);
772  setSLIRCLR(~SLIR_RA);
773  if(tmp & (SLIR_ARP4 | SLIR_ARP6))
774  {
775  getSLDHAR(arp->dha);
776  return 0;
777  }
778  return -1;
779 }
780 
781 int8_t wizchip_ping(wiz_PING* ping)
782 {
783  uint8_t tmp;
784  setPINGIDR(ping->id);
785  setPINGSEQR(ping->seq);
786  if(ping->destinfo.len == 16)
787  {
788  setSLDIP6R(ping->destinfo.ip);
789  setSLCR(SLCR_PING6);
790  }
791  else
792  {
793  setSLDIP4R(ping->destinfo.ip);
794  setSLCR(SLCR_PING4);
795  }
796  while(getSLCR());
797  while((tmp = getSLIR()) == 0x00);
798  setSLIRCLR(~SLIR_RA);
799  if(tmp & (SLIR_PING4 | SLIR_PING6)) return 0;
800  return -1;
801 }
802 
803 int8_t wizchip_dad(uint8_t* ipv6)
804 {
805  uint8_t tmp;
806  setSLDIP6R(ipv6);
807  setSLCR(SLCR_NS);
808  while(getSLCR());
809  while((tmp = getSLIR()) == 0x00);
810  setSLIRCLR(~SLIR_RA);
811  if(tmp & SLIR_TOUT) return 0;
812  return -1;
813 }
814 
815 int8_t wizchip_slaac(wiz_Prefix* prefix)
816 {
817  uint8_t tmp;
818  setSLCR(SLCR_RS);
819  while(getSLCR());
820  while((tmp = getSLIR()) == 0x00);
821  setSLIRCLR(~SLIR_RA);
822  if(tmp & SLIR_RS)
823  {
824  prefix->len = getPLR();
825  prefix->flag = getPFR();
826  prefix->valid_lifetime = getVLTR();
827  prefix->preferred_lifetime = getPLTR();
828  getPAR(prefix->prefix);
829  return 0;
830  }
831  return -1;
832 }
833 
834 int8_t wizchip_unsolicited(void)
835 {
836  uint8_t tmp;
837  setSLCR(SLCR_UNA);
838  while(getSLCR());
839  while((tmp = getSLIR()) == 0x00);
840  setSLIRCLR(~SLIR_RA);
841  if(tmp & SLIR_TOUT) return 0;
842  return -1;
843 }
844 
845 int8_t wizchip_getprefix(wiz_Prefix * prefix)
846 {
847  if(getSLIR() & SLIR_RA)
848  {
849  prefix->len = getPLR();
850  prefix->flag = getPFR();
851  prefix->valid_lifetime = getVLTR();
852  prefix->preferred_lifetime = getPLTR();
853  getPAR(prefix->prefix);
854  setSLIRCLR(SLIR_RA);
855  }
856  return -1;
857 }
getSLIR
#define getSLIR()
Definition: w6100.h:3455
BMCR_PWDN
#define BMCR_PWDN
Ethernet PHY Power Down Mode.
Definition: w6100.h:3187
PHY_MODE_TE
#define PHY_MODE_TE
Configured PHY operation mode with 10Base-Te.
Definition: wizchip_conf.h:381
getSIPR
#define getSIPR(sipr)
Definition: w6100.h:3622
PHY_LINK_OFF
#define PHY_LINK_OFF
PHY Link Off. Refer to CW_GET_PHYLINK.
Definition: wizchip_conf.h:386
wiz_IPAddress_t::ip
uint8_t ip[16]
Destination IP Address. IPv4 index : 0 to 3, IPv6 index : 0 to 15.
Definition: wizchip_conf.h:519
getSLDHAR
#define getSLDHAR(sldhar)
Definition: w6100.h:3663
setIMR
#define setIMR(imr)
Definition: w6100.h:3458
wiz_mdio_read
uint16_t wiz_mdio_read(uint8_t phyregaddr)
Read data from the PHY via MDC/MDIO interface.
ipconf_mode
ipconf_mode
IP Address Configuration Mode.
Definition: wizchip_conf.h:423
getSYCR0
#define getSYCR0()
Definition: w6100.h:3431
CNS_DAD
@ CNS_DAD
Duplicated IPv6 Address Detection.
Definition: wizchip_conf.h:300
setSn_TXBUF_SIZE
#define setSn_TXBUF_SIZE(sn, tmsr)
Definition: w6100.h:3939
ctlnetwork_type
ctlnetwork_type
Network control type enumeration.
Definition: wizchip_conf.h:278
wiz_NetTimeout_t::sl_retry_cnt
uint8_t sl_retry_cnt
The retry count of SOCKET-less.
Definition: wizchip_conf.h:506
wizchip_bus_read_buf
void wizchip_bus_read_buf(uint32_t AddrSel, iodata_t *buf, datasize_t len, uint8_t addrinc)
Default function to read iodata_t buffer by using BUS interface.
Definition: wizchip_conf.c:113
CW_SET_SYSCLK
@ CW_SET_SYSCLK
Set the system clock with SYSCLK_100MHZ or SYSCLK_10MHZ only when SYS_CHIP_LOCK is unlock.
Definition: wizchip_conf.h:259
SLCR_ARP6
#define SLCR_ARP6
IPv6 ARP Command.
Definition: w6100.h:1744
wiz_PhyConf_t::duplex
uint8_t duplex
set by PHY_DUPLEX_HALF PHY_DUPLEX_FULL
Definition: wizchip_conf.h:413
getSLRTR
#define getSLRTR()
Definition: w6100.h:3784
CHIPUNLOCK
#define CHIPUNLOCK()
Definition: w6100.h:3743
PHY_MODE_MANUAL
#define PHY_MODE_MANUAL
Configured PHY operation mode with user setting. Refer to CW_SET_PHYCONF and CW_GET_PHYCONF.
Definition: wizchip_conf.h:373
wizchip_sw_reset
void wizchip_sw_reset(void)
Soft Reset _WIZCHIP_.
Definition: wizchip_conf.c:471
CN_SET_NETMODE
@ CN_SET_NETMODE
Set network mode with netmode_type.
Definition: wizchip_conf.h:282
PHYLOCK
#define PHYLOCK()
Definition: w6100.h:3760
wizchip_cs_deselect
void wizchip_cs_deselect(void)
Default function to de-select _WIZCHIP_.
Definition: wizchip_conf.c:72
SYSCLK_100MHZ
#define SYSCLK_100MHZ
System Clock 100MHz. Refer to Refer to CW_SET_SYSCLK and CW_GET_SYSCLK.
Definition: wizchip_conf.h:370
__WIZCHIP_T__::_IF::_SPI::_write_byte_buf
void(* _write_byte_buf)(uint8_t *pBuf, datasize_t len)
Write byte data as many as len to _WIZCHIP_ through SPI.
Definition: wizchip_conf.h:213
setSYCR1
#define setSYCR1(sycr1)
Definition: w6100.h:3440
CW_SET_PHYPOWMODE
@ CW_SET_PHYPOWMODE
Set PHY power mode with PHY_POWER_NORM or PHY_POWER_DOWN.
Definition: wizchip_conf.h:266
setSn_RXBUF_SIZE
#define setSn_RXBUF_SIZE(sn, rmsr)
Definition: w6100.h:3963
NETLOCK
#define NETLOCK()
Definition: w6100.h:3751
wiz_NetInfo_t::lla
uint8_t lla[16]
Source Link Local Address.
Definition: wizchip_conf.h:448
wiz_NetInfo_t::gua
uint8_t gua[16]
Source Global Unicast Address.
Definition: wizchip_conf.h:449
wizchip_spi_read_buf
void wizchip_spi_read_buf(uint8_t *buf, datasize_t len)
Default function to read buffer by using SPI interface.
Definition: wizchip_conf.c:186
SYS_PHY_LOCK
#define SYS_PHY_LOCK
PHY LOCK. Refer to CW_SYS_LOCK, CW_SYS_UNLOCK, and CW_GET_SYSLOCK.
Definition: wizchip_conf.h:368
CN_SET_PREFER
@ CN_SET_PREFER
Set the preferred source IPv6 address of _SLCR_. Refer to IPV6_ADDR_AUTO, IPV6_ADDR_LLA,...
Definition: wizchip_conf.h:286
SLIR_TOUT
#define SLIR_TOUT
TOUT bit of _SLIR_.
Definition: w6100.h:1585
wiz_NetInfo_t::dns
uint8_t dns[4]
DNS server IPv4 Address.
Definition: wizchip_conf.h:452
PHY_DUPLEX_FULL
#define PHY_DUPLEX_FULL
PHY Link Full-Duplex. Refer to CW_SET_PHYCONF and CW_GET_PHYCONF.
Definition: wizchip_conf.h:385
ctlnetwork
int8_t ctlnetwork(ctlnetwork_type cntype, void *arg)
Controls to network.
Definition: wizchip_conf.c:415
PHY_SPEED_10
#define PHY_SPEED_10
PHY Link Speed 10. Refer to CW_SET_PHYCONF and CW_GET_PHYCONF.
Definition: wizchip_conf.h:382
NETUNLOCK
#define NETUNLOCK()
Definition: w6100.h:3752
SLCR_RS
#define SLCR_RS
IPv6 Auto-configuration RS Command.
Definition: w6100.h:1784
setSLRTR
#define setSLRTR(slrtr)
Definition: w6100.h:3778
CW_GET_INTERRUPT
@ CW_GET_INTERRUPT
Get the interrupt status with intr_kind.
Definition: wizchip_conf.h:247
__WIZCHIP_T__::_CS::_d_e_s_e_l_e_c_t_
void(* _d_e_s_e_l_e_c_t_)(void)
_WIZCHIP_ deselected
Definition: wizchip_conf.h:192
__WIZCHIP_T__::if_mode
uint16_t if_mode
HOST Interface Mode.
Definition: wizchip_conf.h:178
wizchip_spi_write_buf
void wizchip_spi_write_buf(uint8_t *buf, datasize_t len)
Default function to write buffer by using SPI interface.
Definition: wizchip_conf.c:200
wiz_PING_t
Destination Information & Destination Hardware Address for CNS_ARP.
Definition: wizchip_conf.h:560
setSIPR
#define setSIPR(sipr)
Definition: w6100.h:3619
__WIZCHIP_T__::_IF::_BUS::_read_data_buf
void(* _read_data_buf)(uint32_t AddrSel, iodata_t *pBuf, datasize_t len, uint8_t addrinc)
Read iodata_t as many as len from _WIZCHIP_ through BUS.
Definition: wizchip_conf.h:203
setSYCR0
#define setSYCR0(sycr0)
Definition: w6100.h:3434
CN_GET_NETINFO
@ CN_GET_NETINFO
Get Network with wiz_NetInfo.
Definition: wizchip_conf.h:281
BMCR_RST
#define BMCR_RST
Ethernet PHY S/W Reset.
Definition: w6100.h:3150
setSIMR
#define setSIMR(simr)
Definition: w6100.h:3468
wizchip_clrinterrupt
void wizchip_clrinterrupt(intr_kind intr)
Clear Interrupt of _WIZCHIP_.
Definition: wizchip_conf.c:526
CW_GET_PHYPOWMODE
@ CW_GET_PHYPOWMODE
Get PHY Power mode with PHY_POWER_NORM or PHY_POWER_DOWN.
Definition: wizchip_conf.h:267
setPHYCR1
#define setPHYCR1(phycr1)
Definition: w6100.h:3529
__WIZCHIP_T__::_CRIS::_e_n_t_e_r_
void(* _e_n_t_e_r_)(void)
critical section enter
Definition: wizchip_conf.h:184
CNS_SLAAC
@ CNS_SLAAC
Stateless Address Auto-configuration(SLAAC) with wiz_Prefix.
Definition: wizchip_conf.h:309
wiz_ARP_t::dha
uint8_t dha[6]
Destination Hardware Address when ARP-reply is received from the destination.
Definition: wizchip_conf.h:550
wiz_NetInfo_t::dns6
uint8_t dns6[16]
DNS server IPv6 Address.
Definition: wizchip_conf.h:453
wiz_PhyConf_t::mode
uint8_t mode
set by PHY_MODE_MANUAL ,PHY_MODE_AUTONEGO, or PHY_MODE_TE
Definition: wizchip_conf.h:411
getSLIMR
#define getSLIMR()
Definition: w6100.h:3477
setSLPSR
#define setSLPSR(slpsr)
Definition: w6100.h:3484
BMCR_SPD
#define BMCR_SPD
Ethernet PHY Speed.
Definition: w6100.h:3168
setSLIMR
#define setSLIMR(slimr)
Definition: w6100.h:3474
getVLTR
#define getVLTR()
Definition: w6100.h:3715
reg_wizchip_cs_cbfunc
void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
Registers call back functions for _WIZCHIP_ select & deselect.
Definition: wizchip_conf.c:264
CNS_PING
@ CNS_PING
PING process with wiz_IPAddress.
Definition: wizchip_conf.h:299
setINTPTMR
#define setINTPTMR(intptmr)
Definition: w6100.h:3700
wizphy_getphystatus
void wizphy_getphystatus(wiz_PhyConf *phyconf)
Get the real PHY operation status when link is established.
Definition: wizchip_conf.c:649
wiz_NetInfo_t::gw6
uint8_t gw6[16]
Gateway IPv6 Address.
Definition: wizchip_conf.h:451
_WIZCHIP_IO_MODE_SPI_
#define _WIZCHIP_IO_MODE_SPI_
SPI interface mode. Refer to _WIZCHIP_IO_MODE_SPI_VDM_ or _WIZCHIP_IO_MODE_SPI_FDM_.
Definition: wizchip_conf.h:70
PHY_DUPLEX_HALF
#define PHY_DUPLEX_HALF
PHY Link Half-Duplex. Refer to CW_SET_PHYCONF and CW_GET_PHYCONF.
Definition: wizchip_conf.h:384
CW_GET_SYSCLK
@ CW_GET_SYSCLK
Get the system clock with SYSCLK_100MHZ or SYSCLK_10MHZ.
Definition: wizchip_conf.h:260
getNET6MR
#define getNET6MR()
Definition: w6100.h:3550
netmode_type
netmode_type
Network mode Configuration.
Definition: wizchip_conf.h:463
WIZCHIP
_WIZCHIP_T_ WIZCHIP
_WIZCHIP_T_ instance
Definition: wizchip_conf.c:214
wizchip_getinterrupt
intr_kind wizchip_getinterrupt(void)
Get Interrupt of _WIZCHIP_.
Definition: wizchip_conf.c:540
CW_SET_PHYCONF
@ CW_SET_PHYCONF
Set PHY operation mode (Manual/Auto, 10/100, Half/Full) with wiz_PhyConf.
Definition: wizchip_conf.h:263
CN_GET_NETMODE
@ CN_GET_NETMODE
Get network mode with netmode_type.
Definition: wizchip_conf.h:283
CW_GET_PHYLINK
@ CW_GET_PHYLINK
Get PHY Link status with PHY_LINK_ON or PHY_LINK_OFF.
Definition: wizchip_conf.h:268
wiz_IPAddress_t::len
uint8_t len
Destination IP Address Length. IPv4 : 4, IPv6 : 16.
Definition: wizchip_conf.h:520
wiz_Prefix_t
Prefix Information.
Definition: wizchip_conf.h:530
CW_SET_INTRMASK
@ CW_SET_INTRMASK
Set the interrupt mask with intr_kind.
Definition: wizchip_conf.h:249
SYCR1_IEN
#define SYCR1_IEN
IEN bit of _SYCR1_.
Definition: w6100.h:1491
ctlwizchip_type
ctlwizchip_type
_WIZCHIP_ Control Type Enumeration.
Definition: wizchip_conf.h:239
SLIR_ARP6
#define SLIR_ARP6
ARP6 bit of _SLIR_.
Definition: w6100.h:1615
getLLAR
#define getLLAR(llar)
Definition: w6100.h:3628
setNETMR
#define setNETMR(netmr)
Definition: w6100.h:3541
ctlnetservice_type
ctlnetservice_type
Network Service Control Type enumeration.
Definition: wizchip_conf.h:296
CNS_ARP
@ CNS_ARP
ARP process with wiz_IPAddress.
Definition: wizchip_conf.h:298
__WIZCHIP_T__
Callback function set for _WIZCHIP_.
Definition: wizchip_conf.h:173
setGAR
#define setGAR(gar)
Definition: w6100.h:3601
setPINGSEQR
#define setPINGSEQR(pingseqr)
Definition: w6100.h:3675
__WIZCHIP_T__::_IF::_SPI::_read_byte
uint8_t(* _read_byte)(void)
Read 1 byte data from _WIZCHIP_ through SPI.
Definition: wizchip_conf.h:210
PHY_POWER_NORM
#define PHY_POWER_NORM
PHY power normal mode. Refer to CW_SET_PHYPOWMODE and CW_GET_PHYPOWMODE.
Definition: wizchip_conf.h:388
PHYSR_DPX
#define PHYSR_DPX
DPX mask bit of _PHYSR_.
Definition: w6100.h:1890
PHY_POWER_DOWN
#define PHY_POWER_DOWN
PHY power down mode. Refer to CW_SET_PHYPOWMODE and CW_GET_PHYPOWMODE.
Definition: wizchip_conf.h:389
setSLDIP4R
#define setSLDIP4R(sldip4r)
Definition: w6100.h:3651
wizphy_getphylink
int8_t wizphy_getphylink(void)
Get the Link status of integrated PHY.
Definition: wizchip_conf.c:564
CW_INIT_WIZCHIP
@ CW_INIT_WIZCHIP
Initialize to SOCKETn buffer size with n byte array typed uint8_t.
Definition: wizchip_conf.h:246
wizchip_init
int8_t wizchip_init(uint8_t *txsize, uint8_t *rxsize)
Initializes SOCKETn TX/RX buffer size.
Definition: wizchip_conf.c:498
BMCR_DPX
#define BMCR_DPX
Ethernet PHY Duplex.
Definition: w6100.h:3215
wiz_NetInfo_t::sn6
uint8_t sn6[16]
IPv6 Prefix.
Definition: wizchip_conf.h:450
CN_SET_TIMEOUT
@ CN_SET_TIMEOUT
Set network timeout with wiz_NetTimeout.
Definition: wizchip_conf.h:284
setNETMR2
#define setNETMR2(netmr2)
Definition: w6100.h:3544
reg_wizchip_spi_cbfunc
void reg_wizchip_spi_cbfunc(uint8_t(*spi_rb)(void), void(*spi_wb)(uint8_t wb), void(*spi_rbuf)(uint8_t *buf, datasize_t len), void(*spi_wbuf)(uint8_t *buf, datasize_t len))
Registers call back functions for SPI interface.
CW_SYS_LOCK
@ CW_SYS_LOCK
Lock or Unlock _WIZCHIP_ with SYS_CHIP_LOCK, SYS_PHY_LOCK, and SYS_NET_LOCK.
Definition: wizchip_conf.h:241
SLIR_RS
#define SLIR_RS
RS bit of _SLIR_.
Definition: w6100.h:1656
getSLPSR
#define getSLPSR()
Definition: w6100.h:3487
setSUBR
#define setSUBR(subr)
Definition: w6100.h:3610
wizchip_unsolicited
int8_t wizchip_unsolicited(void)
Unsolicited NA process.
Definition: wizchip_conf.c:834
__WIZCHIP_T__::_IF::_BUS::_write_data
void(* _write_data)(uint32_t AddrSel, iodata_t wb)
Write 1 iodata_t to _WIZCHIP_ through BUS.
Definition: wizchip_conf.h:202
getPHYSR
#define getPHYSR()
Definition: w6100.h:3496
wizphy_setphypmode
void wizphy_setphypmode(uint8_t pmode)
Set the power mode of integrated Ethernet PHY.
Definition: wizchip_conf.c:659
wizchip_spi_write
void wizchip_spi_write(uint8_t wb)
Default function to write one byte by using SPI interface.
Definition: wizchip_conf.c:175
PHYRAR_BMCR
#define PHYRAR_BMCR
Basic Mode Control Register of Ethernet PHY [RW][0x3100].
Definition: w6100.h:3104
PHY_SPEED_100
#define PHY_SPEED_100
PHY Link Speed 100. Refer to CW_SET_PHYCONF and CW_GET_PHYCONF.
Definition: wizchip_conf.h:383
getGUAR
#define getGUAR(guar)
Definition: w6100.h:3634
getINTPTMR
#define getINTPTMR()
Definition: w6100.h:3706
getPFR
#define getPFR()
Definition: w6100.h:3712
wizchip_bus_read
iodata_t wizchip_bus_read(uint32_t AddrSel)
Default function to read one iodata_t data by using BUS interface.
Definition: wizchip_conf.c:87
intr_kind
intr_kind
Interrupt Kind.
Definition: wizchip_conf.h:332
__WIZCHIP_T__::CRIS
struct __WIZCHIP_T__::_CRIS CRIS
The set of _WIZCHIP_ select control callback function.
CW_GET_PHYSTATUS
@ CW_GET_PHYSTATUS
Get real operation mode with wiz_PhyConf when PHY is linked up.
Definition: wizchip_conf.h:265
CW_GET_ID
@ CW_GET_ID
Get _WIZCHIP_ name.
Definition: wizchip_conf.h:256
setSUB6R
#define setSUB6R(sub6r)
Definition: w6100.h:3637
getGA6R
#define getGA6R(ga6r)
Definition: w6100.h:3646
CW_RESET_PHY
@ CW_RESET_PHY
Reset PHY.
Definition: wizchip_conf.h:262
PHYUNLOCK
#define PHYUNLOCK()
Definition: w6100.h:3761
getSUBR
#define getSUBR(subr)
Definition: w6100.h:3613
wizchip_getnetmode
netmode_type wizchip_getnetmode(void)
Get the network mode such as WOL, PPPoE, PING Block, and etc.
Definition: wizchip_conf.c:731
CW_GET_INTRTIME
@ CW_GET_INTRTIME
Get the interrupt pending time.
Definition: wizchip_conf.h:252
getSHAR
#define getSHAR(shar)
Definition: w6100.h:3598
wiz_NetTimeout_t
Network Timeout for _WIZCHIP_.
Definition: wizchip_conf.h:502
__WIZCHIP_T__::_CRIS::_e_x_i_t_
void(* _e_x_i_t_)(void)
critical section exit
Definition: wizchip_conf.h:185
setRCR
#define setRCR(rcr)
Definition: w6100.h:3772
wiz_NetInfo_t::mac
uint8_t mac[6]
Source Hardware Address.
Definition: wizchip_conf.h:444
__WIZCHIP_T__::_IF::_BUS::_write_data_buf
void(* _write_data_buf)(uint32_t AddrSel, iodata_t *pBuf, datasize_t len, uint8_t addrinc)
Write iodata_t data as many as len to _WIZCHIP_ through BUS.
Definition: wizchip_conf.h:204
getRCR
#define getRCR()
Definition: w6100.h:3775
setRTR
#define setRTR(rtr)
Definition: w6100.h:3763
getGAR
#define getGAR(gar)
Definition: w6100.h:3604
wizphy_setphyconf
void wizphy_setphyconf(wiz_PhyConf *phyconf)
Definition: wizchip_conf.c:587
getSIR
#define getSIR()
Definition: w6100.h:3452
__WIZCHIP_T__::_IF::BUS
struct __WIZCHIP_T__::_IF::_BUS BUS
The callback function of _WIZCHIP_IO_MODE_SPI_ such as _WIZCHIP_IO_MODE_SPI_VDM_ and _WIZCHIP_IO_MODE...
wizchip_getinterruptmask
intr_kind wizchip_getinterruptmask(void)
Get Interrupt mask of _WIZCHIP_.
Definition: wizchip_conf.c:557
CW_GET_SYSLOCK
@ CW_GET_SYSLOCK
Get the lock status of _WIZCHIP_ with SYS_CHIP_LOCK, SYS_PHY_LOCK, and SYS_NET_LOCK.
Definition: wizchip_conf.h:243
SYSR_NETL
#define SYSR_NETL
NET Lock status bit of _SYSR_.
Definition: w6100.h:1438
wizchip_bus_write
void wizchip_bus_write(uint32_t AddrSel, iodata_t wb)
Default function to write one iodata_t data by using BUS interface.
Definition: wizchip_conf.c:98
wiz_PhyConf_t::speed
uint8_t speed
set by PHY_SPEED_10 or PHY_SPEED_100
Definition: wizchip_conf.h:412
getNET4MR
#define getNET4MR()
Definition: w6100.h:3547
getIR
#define getIR()
Definition: w6100.h:3449
getRTR
#define getRTR()
Definition: w6100.h:3769
CW_GET_INTRMASK
@ CW_GET_INTRMASK
Get the interrupt mask with intr_kind.
Definition: wizchip_conf.h:250
wiz_PING_t::id
uint16_t id
Definition: wizchip_conf.h:562
setSn_IRCLR
#define setSn_IRCLR(sn, irclr)
Definition: w6100.h:3833
_WIZCHIP_SOCK_NUM_
#define _WIZCHIP_SOCK_NUM_
Define I/O base address of _WIZCHIP_.
Definition: wizchip_conf.h:157
wiz_NetTimeout_t::s_time_100us
uint16_t s_time_100us
The retransmission time of SOCKETn (unit 100us)
Definition: wizchip_conf.h:505
getPLR
#define getPLR()
Definition: w6100.h:3709
__WIZCHIP_T__::IF
union __WIZCHIP_T__::_IF IF
wiz_NetInfo_t::ipmode
ipconf_mode ipmode
IP Configuration Mode.
Definition: wizchip_conf.h:454
wiz_Prefix_t::prefix
uint8_t prefix[16]
Prefix.
Definition: wizchip_conf.h:536
wizchip_slaac
int8_t wizchip_slaac(wiz_Prefix *prefix)
Stateless Address Auto Configuration(SLAAC) process.
Definition: wizchip_conf.c:815
setGUAR
#define setGUAR(guar)
Definition: w6100.h:3631
wizchip_dad
int8_t wizchip_dad(uint8_t *ipv6)
DAD(Duplcated Address Detection) process.
Definition: wizchip_conf.c:803
wizchip_spi_read
uint8_t wizchip_spi_read(void)
Default function to read one byte by using SPI interface.
Definition: wizchip_conf.c:165
getSLCR
#define getSLCR()
Definition: w6100.h:3493
SLCR_PING4
#define SLCR_PING4
IPv4 PING Command.
Definition: w6100.h:1731
PHYCR0_AUTO
#define PHYCR0_AUTO
PHY Operation Mode - Auto Negotiation.
Definition: w6100.h:2007
wiz_Prefix_t::preferred_lifetime
uint32_t preferred_lifetime
Preferred Lifetime.
Definition: wizchip_conf.h:535
SLCR_ARP4
#define SLCR_ARP4
IPv4 ARP Command.
Definition: w6100.h:1718
setLLAR
#define setLLAR(llar)
Definition: w6100.h:3625
__WIZCHIP_T__::_IF::_SPI::_write_byte
void(* _write_byte)(uint8_t wb)
Write 1 byte data to _WIZCHIP_ through SPI.
Definition: wizchip_conf.h:211
getPHYCR1
#define getPHYCR1()
Definition: w6100.h:3532
ctlwizchip
int8_t ctlwizchip(ctlwizchip_type cwtype, void *arg)
Control _WIZCHIP_.
Definition: wizchip_conf.c:313
getSIMR
#define getSIMR()
Definition: w6100.h:3471
wiz_NetInfo_t::gw
uint8_t gw[4]
Gateway IPv4 Address.
Definition: wizchip_conf.h:447
wizchip_getnetinfo
void wizchip_getnetinfo(wiz_NetInfo *pnetinfo)
Get the network information of _WIZCHIP_.
Definition: wizchip_conf.c:703
setSLCR
#define setSLCR(slcr)
Definition: w6100.h:3490
CNS_GET_PREFIX
@ CNS_GET_PREFIX
Get prefix information with wiz_Prefix.
Definition: wizchip_conf.h:318
__WIZCHIP_T__::_CS::_s_e_l_e_c_t_
void(* _s_e_l_e_c_t_)(void)
_WIZCHIP_ selected
Definition: wizchip_conf.h:191
setSLIRCLR
#define setSLIRCLR(slirclr)
Definition: w6100.h:3480
wiz_Prefix_t::flag
uint8_t flag
Prefix Flag.
Definition: wizchip_conf.h:533
PHY_MODE_AUTONEGO
#define PHY_MODE_AUTONEGO
Configured PHY operation mode with auto-negotiation. Refer to CW_SET_PHYCONF and CW_GET_PHYCONF.
Definition: wizchip_conf.h:374
__WIZCHIP_T__::_IF::_BUS::_read_data
iodata_t(* _read_data)(uint32_t AddrSel)
Read 1 iodata_t from _WIZCHIP_ through BUS.
Definition: wizchip_conf.h:201
__WIZCHIP_T__::_IF::_SPI::_read_byte_buf
void(* _read_byte_buf)(uint8_t *pBuf, datasize_t len)
Read byte data as many as len from _WIZCHIP_ through SPI.
Definition: wizchip_conf.h:212
setGA6R
#define setGA6R(ga6r)
Definition: w6100.h:3643
SYCR1_CLKSEL
#define SYCR1_CLKSEL
System Clock select mask bit of _SYCR1_.
Definition: w6100.h:1505
setNET4MR
#define setNET4MR(net4mr)
Definition: w6100.h:3535
SLIR_PING4
#define SLIR_PING4
PING4 bit of _SLIR_.
Definition: w6100.h:1605
getNETMR2
#define getNETMR2()
Definition: w6100.h:3556
getNETMR
#define getNETMR()
Definition: w6100.h:3553
__WIZCHIP_T__::CS
struct __WIZCHIP_T__::_CS CS
The set of interface IO callback function.
wiz_mdio_write
void wiz_mdio_write(uint8_t phyregaddr, uint16_t var)
Write data to the PHY via MDC/MDIO interface.
CW_SET_INTRTIME
@ CW_SET_INTRTIME
Set the interrupt pending time.
Definition: wizchip_conf.h:251
SLCR_PING6
#define SLCR_PING6
IPv6 PING Command.
Definition: w6100.h:1757
PHYCR1_RST
#define PHYCR1_RST
PHY function - HW Reset.
Definition: w6100.h:2087
reg_wizchip_cris_cbfunc
void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
Registers call back functions for critical section.
Definition: wizchip_conf.c:256
BMSR_LINK_STATUS
#define BMSR_LINK_STATUS
Ethernet PHY Link Status.
Definition: w6100.h:3313
CW_CLR_INTERRUPT
@ CW_CLR_INTERRUPT
Clear the interrupt with intr_kind.
Definition: wizchip_conf.h:248
PHYRAR_BMSR
#define PHYRAR_BMSR
Basic Mode Status Register of Ethernet PHY [RO][0x7809].
Definition: w6100.h:3135
SYCR0_RST
#define SYCR0_RST
RST bit of _SYCR0_.
Definition: w6100.h:1480
reg_wizchip_bus_cbfunc
void reg_wizchip_bus_cbfunc(iodata_t(*bus_rd)(uint32_t addr), void(*bus_wd)(uint32_t addr, iodata_t wb), void(*bus_rbuf)(uint32_t addr, iodata_t *buf, datasize_t len, uint8_t inc), void(*bus_wbuf)(uint32_t addr, iodata_t *buf, datasize_t len, uint8_t inc))
Registers call back functions for BUS interface.
PHY_LINK_ON
#define PHY_LINK_ON
PHY Link On. Refer to CW_GET_PHYLINK.
Definition: wizchip_conf.h:387
SYS_CHIP_LOCK
#define SYS_CHIP_LOCK
CHIP LOCK. Refer to CW_SYS_LOCK, CW_SYS_UNLOCK, and CW_GET_SYSLOCK.
Definition: wizchip_conf.h:366
CN_SET_NETINFO
@ CN_SET_NETINFO
Set Network with wiz_NetInfo.
Definition: wizchip_conf.h:280
wizphy_reset
void wizphy_reset(void)
Reset the integrated PHY.
Definition: wizchip_conf.c:574
wiz_NetInfo_t::ip
uint8_t ip[4]
Source IPv4 Address.
Definition: wizchip_conf.h:445
SLIR_PING6
#define SLIR_PING6
PING6 bit of _SLIR_.
Definition: w6100.h:1625
CNS_UNSOL_NA
@ CNS_UNSOL_NA
Unsolicited Neighbor Advertisement for update _WIZCHIP_ network information to neighbors.
Definition: wizchip_conf.h:310
wizchip_getprefix
int8_t wizchip_getprefix(wiz_Prefix *prefix)
Get a prefix information of RA message from a router.
Definition: wizchip_conf.c:845
CW_SET_IEN
@ CW_SET_IEN
Set the global interrupt enable only when SYS_CHIP_LOCK is not set.
Definition: wizchip_conf.h:253
_WIZCHIP_IO_MODE_BUS_
#define _WIZCHIP_IO_MODE_BUS_
Bus interface mode. Refer to _WIZCHIP_IO_MODE_BUS_DIR_ or _WIZCHIP_IO_MODE_BUS_INDIR_.
Definition: wizchip_conf.h:69
setNET6MR
#define setNET6MR(net6mr)
Definition: w6100.h:3538
__WIZCHIP_T__::id
uint8_t id[6]
ID of CHIP such as W6100, and so on.
Definition: wizchip_conf.h:179
ctlnetservice
int8_t ctlnetservice(ctlnetservice_type cnstype, void *arg)
Controls to network service.
Definition: wizchip_conf.c:449
wizphy_getphyconf
void wizphy_getphyconf(wiz_PhyConf *phyconf)
Get the integrated Ethernet PHY operation mode.
Definition: wizchip_conf.c:630
CN_GET_TIMEOUT
@ CN_GET_TIMEOUT
Get network timeout with wiz_NetTimeout.
Definition: wizchip_conf.h:285
wiz_ARP_t::destinfo
wiz_IPAddress destinfo
Destination IP address for ARP-request.
Definition: wizchip_conf.h:549
SYSCLK_25MHZ
#define SYSCLK_25MHZ
System Clock 25MHz. Refer to Refer to CW_SET_SYSCLK and CW_GET_SYSCLK.
Definition: wizchip_conf.h:371
wizchip_cris_enter
void wizchip_cris_enter(void)
Default function to enter the critical section for _WIZCHIP_.
Definition: wizchip_conf.c:45
SLIR_RA
#define SLIR_RA
ICMPv6 RA Received Interrupt.
Definition: w6100.h:1672
SYS_NET_LOCK
#define SYS_NET_LOCK
NETWORK Information LOCK. Refer to CW_SYS_LOCK, CW_SYS_UNLOCK, and CW_GET_SYSLOCK.
Definition: wizchip_conf.h:367
wiz_NetInfo_t
Network Information for _WIZCHIP_.
Definition: wizchip_conf.h:442
wizchip_bus_write_buf
void wizchip_bus_write_buf(uint32_t AddrSel, iodata_t *buf, datasize_t len, uint8_t addrinc)
Default function to write iodata_t buffer by using BUS interface.
Definition: wizchip_conf.c:137
wiz_PhyConf_t
Ethernet PHY operation mode configuration.
Definition: wizchip_conf.h:409
wiz_PING_t::seq
uint16_t seq
Definition: wizchip_conf.h:563
setSHAR
#define setSHAR(shar)
Definition: w6100.h:3595
SLCR_UNA
#define SLCR_UNA
IPv6 Unsolicited NA Command.
Definition: w6100.h:1795
wiz_ARP_t
Destination Information & Destination Hardware Address for CNS_ARP.
Definition: wizchip_conf.h:547
getSYSR
#define getSYSR()
Definition: w6100.h:3428
setSLDIP6R
#define setSLDIP6R(sldip6r)
Definition: w6100.h:3657
wiz_Prefix_t::len
uint8_t len
Prefix Length. It is used to set _SUB6R_ to 1 as many as len from LSB bit.
Definition: wizchip_conf.h:532
CW_RESET_WIZCHIP
@ CW_RESET_WIZCHIP
Reset _WIZCHIP_ by software.
Definition: wizchip_conf.h:245
getSUB6R
#define getSUB6R(sub6r)
Definition: w6100.h:3640
CHIPLOCK
#define CHIPLOCK()
Definition: w6100.h:3742
wizchip_settimeout
void wizchip_settimeout(wiz_NetTimeout *nettime)
Set retransmission time values and retry counts.
Definition: wizchip_conf.c:741
setIRCLR
#define setIRCLR(irclr)
Definition: w6100.h:3464
setPINGIDR
#define setPINGIDR(pingidr)
Definition: w6100.h:3666
wiz_PING_t::destinfo
wiz_IPAddress destinfo
Definition: wizchip_conf.h:564
getSYCR1
#define getSYCR1()
Definition: w6100.h:3437
wizchip_arp
int8_t wizchip_arp(wiz_ARP *arp)
ARP process.
Definition: wizchip_conf.c:757
CN_GET_PREFER
@ CN_GET_PREFER
Get the preferred source IPv6 address of _SLCR_. Refer to IPV6_ADDR_AUTO, IPV6_ADDR_LLA,...
Definition: wizchip_conf.h:287
getPLTR
#define getPLTR()
Definition: w6100.h:3721
wizchip_gettimeout
void wizchip_gettimeout(wiz_NetTimeout *nettime)
Get retransmission time values and retry counts.
Definition: wizchip_conf.c:749
getIMR
#define getIMR()
Definition: w6100.h:3461
wizchip_setnetinfo
void wizchip_setnetinfo(wiz_NetInfo *pnetinfo)
Set the network information for _WIZCHIP_.
Definition: wizchip_conf.c:685
wizchip_ping
int8_t wizchip_ping(wiz_PING *ping)
PING process.
Definition: wizchip_conf.c:781
CW_SYS_UNLOCK
@ CW_SYS_UNLOCK
Lock or Unlock _WIZCHIP_ with SYS_CHIP_LOCK, SYS_PHY_LOCK, and SYS_NET_LOCK.
Definition: wizchip_conf.h:242
wiz_NetTimeout_t::s_retry_cnt
uint8_t s_retry_cnt
The default retry count of SOCKETn.
Definition: wizchip_conf.h:504
wizchip_setnetmode
void wizchip_setnetmode(netmode_type netmode)
Set the network mode such as WOL, PPPoE, PING Block, and etc.
Definition: wizchip_conf.c:722
CW_GET_PHYCONF
@ CW_GET_PHYCONF
Get PHY operation mode (Manual/Auto, 10/100, Half/Full) with wiz_PhyConf.
Definition: wizchip_conf.h:264
wiz_NetTimeout_t::sl_time_100us
uint16_t sl_time_100us
The retransmission time of SOCKET-less (unit 100us)
Definition: wizchip_conf.h:507
PHYSR_SPD
#define PHYSR_SPD
SPD mask bit of _PHYSR_.
Definition: w6100.h:1916
wiz_Prefix_t::valid_lifetime
uint32_t valid_lifetime
Valid Lifetime.
Definition: wizchip_conf.h:534
getVER
#define getVER()
Definition: w6100.h:3425
setPHYCR0
#define setPHYCR0(phycr0)
Definition: w6100.h:3526
setSLRCR
#define setSLRCR(slrcr)
Definition: w6100.h:3787
wizchip_conf.h
WIZCHIP Config Header File.
wizphy_getphypmode
int8_t wizphy_getphypmode(void)
get the power mode of integrated Ethernet PHY.
Definition: wizchip_conf.c:675
PHYCR1_PWDN
#define PHYCR1_PWDN
PHY function - Power Down.
Definition: w6100.h:2064
PHYSR_LNK
#define PHYSR_LNK
LNK mask bit of _PHYSR_.
Definition: w6100.h:1942
getPAR
#define getPAR(par)
Definition: w6100.h:3727
SLIR_ARP4
#define SLIR_ARP4
ARP4 bit of _SLIR_.
Definition: w6100.h:1595
wizchip_setinterruptmask
void wizchip_setinterruptmask(intr_kind intr)
Mask or Unmask Interrupt of _WIZCHIP_.
Definition: wizchip_conf.c:547
wizchip_cs_select
void wizchip_cs_select(void)
Default function to select _WIZCHIP_.
Definition: wizchip_conf.c:63
__WIZCHIP_T__::_IF::SPI
struct __WIZCHIP_T__::_IF::_SPI SPI
CW_GET_VER
@ CW_GET_VER
Get the version of TCP/IP TOE engine.
Definition: wizchip_conf.h:257
getSLRCR
#define getSLRCR()
Definition: w6100.h:3790
SLCR_NS
#define SLCR_NS
IPv6 DAD(Duplicate Address Detection) NS Command.
Definition: w6100.h:1770
wiz_NetInfo_t::sn
uint8_t sn[4]
Subnet Mask value.
Definition: wizchip_conf.h:446
SYSR_CHPL
#define SYSR_CHPL
CHIP Lock staus bit of _SYSR_.
Definition: w6100.h:1423
wizchip_cris_exit
void wizchip_cris_exit(void)
Default function to exit the critical section for _WIZCHIP_.
Definition: wizchip_conf.c:54
CW_GET_IEN
@ CW_GET_IEN
Get the global interrupt enable.
Definition: wizchip_conf.h:254
PHYCR1_TE
#define PHYCR1_TE
PHY function - 10Base-TE Mode.
Definition: w6100.h:2074
BMCR_ANE
#define BMCR_ANE
Ethernet PHY Auto-Negotiation.
Definition: w6100.h:3178
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