io6Library
WIZnet Dual Stack TCP/IP Ethernet Controller Driver
w6100.c
Go to the documentation of this file.
1 //*****************************************************************************
2 //
32 //*****************************************************************************
33 
34 #include "w6100.h"
35 
36 
37 
38 #define _WIZCHIP_SPI_VDM_OP_ 0x00
39 #define _WIZCHIP_SPI_FDM_LEN1_ 0x01
40 #define _WIZCHIP_SPI_FDM_LEN2_ 0x02
41 #define _WIZCHIP_SPI_FDM_LEN4_ 0x03
42 //
43 // If you want to use SPI FDM mode, Feel free contact to WIZnet.
44 // http://forum.wiznet.io
45 //
46 
47 #if _WIZCHIP_ == 6100
48 
50 
51 #define _W6100_SPI_OP_ _WIZCHIP_SPI_VDM_OP_
52 
54 void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb )
55 {
56  uint8_t tAD[4];
57  tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
58  tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
59  tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
60  tAD[3] = wb;
61 
62  WIZCHIP_CRITICAL_ENTER();
63  WIZCHIP.CS._s_e_l_e_c_t_();
64 
65 #if( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_))
66  tAD[2] |= (_W6100_SPI_WRITE_ | _W6100_SPI_OP_);
67  WIZCHIP.IF.SPI._write_byte_buf(tAD, 4);
68 
69 #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
70  WIZCHIP.IF.BUS._write_data_buf(IDM_AR0, tAD, 4, 1);
71 #else
72  #error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!"
73 #endif
74 
75  WIZCHIP.CS._d_e_s_e_l_e_c_t_();
76  WIZCHIP_CRITICAL_EXIT();
77 }
78 
79 uint8_t WIZCHIP_READ(uint32_t AddrSel)
80 {
81  uint8_t ret;
82  uint8_t tAD[3];
83  tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
84  tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
85  tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
86 
87  WIZCHIP_CRITICAL_ENTER();
88  WIZCHIP.CS._s_e_l_e_c_t_();
89 
90 #if( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_))
91  tAD[2] |= (_W6100_SPI_READ_ | _W6100_SPI_OP_);
92  WIZCHIP.IF.SPI._write_byte_buf(tAD, 3);
93  ret = WIZCHIP.IF.SPI._read_byte();
94 #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
95  WIZCHIP.IF.BUS._write_data_buf(IDM_AR0,tAD,3,1);
96  ret = WIZCHIP.IF.BUS._read_data(IDM_DR);
97 #else
98  #error "Unknown _WIZCHIP_IO_MODE_ in W6100. !!!"
99 #endif
100 
101  WIZCHIP.CS._d_e_s_e_l_e_c_t_();
102  WIZCHIP_CRITICAL_EXIT();
103  return ret;
104 }
105 
106 void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, datasize_t len)
107 {
108  uint8_t tAD[3];
109  tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
110  tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
111  tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
112 
113 
114  WIZCHIP_CRITICAL_ENTER();
115  WIZCHIP.CS._s_e_l_e_c_t_();
116 
117 #if((_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_))
118  tAD[2] |= (_W6100_SPI_WRITE_ | _W6100_SPI_OP_);
119 
120  WIZCHIP.IF.SPI._write_byte_buf(tAD, 3);
121  WIZCHIP.IF.SPI._write_byte_buf(pBuf, len);
122 
123 #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
124  WIZCHIP.IF.BUS._write_data_buf(IDM_AR0,tAD, 3, 1);
125  WIZCHIP.IF.BUS._write_data_buf(IDM_DR,pBuf,len, 0);
126 #else
127  #error "Unknown _WIZCHIP_IO_MODE_ in W6100. !!!!"
128 #endif
129 
130  WIZCHIP.CS._d_e_s_e_l_e_c_t_();
131  WIZCHIP_CRITICAL_EXIT();
132 }
133 
134 void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, datasize_t len)
135 {
136  uint8_t tAD[3];
137  tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
138  tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
139  tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
140 
141  WIZCHIP_CRITICAL_ENTER();
142  WIZCHIP.CS._s_e_l_e_c_t_();
143 
144 #if((_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_SPI_VDM_))
145  tAD[2] |= (_W6100_SPI_READ_ | _W6100_SPI_OP_);
146  WIZCHIP.IF.SPI._write_byte_buf(tAD,3);
147  WIZCHIP.IF.SPI._read_byte_buf(pBuf, len);
148 #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
149  WIZCHIP.IF.BUS._write_data_buf(IDM_AR0,tAD,3,1);
150  WIZCHIP.IF.BUS._read_data_buf(IDM_DR,pBuf,len,0);
151 #else
152  #error "Unknown _WIZCHIP_IO_MODE_ in W6100. !!!!"
153 #endif
154  WIZCHIP.CS._d_e_s_e_l_e_c_t_();
155  WIZCHIP_CRITICAL_EXIT();
156 }
157 
158 datasize_t getSn_TX_FSR(uint8_t sn)
159 {
160  datasize_t prev_val=-1,val=0;
161  do
162  {
163  prev_val = val;
164  val = WIZCHIP_READ(_Sn_TX_FSR_(sn));
165  val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_TX_FSR_(sn),1));
166  }while (val != prev_val);
167  return val;
168 }
169 
170 datasize_t getSn_RX_RSR(uint8_t sn)
171 {
172  datasize_t prev_val=-1,val=0;
173  do
174  {
175  prev_val = val;
176  val = WIZCHIP_READ(_Sn_RX_RSR_(sn));
177  val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_RX_RSR_(sn),1));
178  }while (val != prev_val);
179  return val;
180 }
181 
182 void wiz_send_data(uint8_t sn, uint8_t *wizdata, datasize_t len)
183 {
184  datasize_t ptr = 0;
185  uint32_t addrsel = 0;
186  ptr = getSn_TX_WR(sn);
187  addrsel = ((uint32_t)ptr << 8) + WIZCHIP_TXBUF_BLOCK(sn);
188  WIZCHIP_WRITE_BUF(addrsel,wizdata, len);
189  ptr += len;
190  setSn_TX_WR(sn,ptr);
191 }
192 
193 void wiz_recv_data(uint8_t sn, uint8_t *wizdata, datasize_t len)
194 {
195  datasize_t ptr = 0;
196  uint32_t addrsel = 0;
197  if(len == 0) return;
198  ptr = getSn_RX_RD(sn);
199  addrsel = ((uint32_t)ptr << 8) + WIZCHIP_RXBUF_BLOCK(sn);
200  WIZCHIP_READ_BUF(addrsel, wizdata, len);
201  ptr += len;
202  setSn_RX_RD(sn,ptr);
203 }
204 
205 void wiz_recv_ignore(uint8_t sn, datasize_t len)
206 {
207  setSn_RX_RD(sn,getSn_RX_RD(sn)+len);
208 }
209 
210 
212 #if (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
213 void wiz_mdio_write(uint8_t phyregaddr, uint16_t var)
215 {
216  setPHYRAR(phyregaddr);
217  setPHYDIR(var);
218  setPHYACR(PHYACR_WRITE);
219  while(getPHYACR()); //wait for command complete
220 }
221 
222 uint16_t wiz_mdio_read(uint8_t phyregaddr)
223 {
224  setPHYRAR(phyregaddr);
225  setPHYACR(PHYACR_READ);
226  while(getPHYACR()); //wait for command complete
227  return getPHYDOR();
228 }
230 #endif
231 
234 #endif
wiz_mdio_read
uint16_t wiz_mdio_read(uint8_t phyregaddr)
Read data from the PHY via MDC/MDIO interface.
setPHYRAR
#define setPHYRAR(phyrar)
Definition: w6100.h:3499
setSn_TX_WR
#define setSn_TX_WR(sn, txwr)
Definition: w6100.h:3953
getSn_TX_WR
#define getSn_TX_WR(sn)
Definition: w6100.h:3958
WIZCHIP_WRITE
void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb)
It writes 1 byte value to a register.
__WIZCHIP_T__::_IF::_SPI::_write_byte_buf
void(* _write_byte_buf)(uint8_t *pBuf, datasize_t len)
Write byte data as many as len to _WIZCHIP_ through SPI.
Definition: wizchip_conf.h:213
WIZCHIP_CRITICAL_ENTER
#define WIZCHIP_CRITICAL_ENTER()
Enter a critical section.
Definition: w6100.h:3348
WIZCHIP_TXBUF_BLOCK
#define WIZCHIP_TXBUF_BLOCK(N)
SOCKETn Tx buffer address block.
Definition: w6100.h:54
WIZCHIP_WRITE_BUF
void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t *pBuf, datasize_t len)
It writes sequential data to registers.
getSn_RX_RD
#define getSn_RX_RD(sn)
Definition: w6100.h:3980
__WIZCHIP_T__::_CS::_d_e_s_e_l_e_c_t_
void(* _d_e_s_e_l_e_c_t_)(void)
_WIZCHIP_ deselected
Definition: wizchip_conf.h:192
__WIZCHIP_T__::_IF::_BUS::_read_data_buf
void(* _read_data_buf)(uint32_t AddrSel, iodata_t *pBuf, datasize_t len, uint8_t addrinc)
Read iodata_t as many as len from _WIZCHIP_ through BUS.
Definition: wizchip_conf.h:203
setPHYDIR
#define setPHYDIR(phydir)
Definition: w6100.h:3505
WIZCHIP_CRITICAL_EXIT
#define WIZCHIP_CRITICAL_EXIT()
Enter a critical section.
Definition: w6100.h:3363
getSn_RX_RSR
datasize_t getSn_RX_RSR(uint8_t s)
WIZCHIP
_WIZCHIP_T_ WIZCHIP
_WIZCHIP_T_ instance
Definition: wizchip_conf.c:214
setSn_RX_RD
#define setSn_RX_RD(sn, rxrd)
Definition: w6100.h:3974
WIZCHIP_READ_BUF
void WIZCHIP_READ_BUF(uint32_t AddrSel, uint8_t *pBuf, datasize_t len)
It reads sequentail data from registers.
__WIZCHIP_T__::_IF::_SPI::_read_byte
uint8_t(* _read_byte)(void)
Read 1 byte data from _WIZCHIP_ through SPI.
Definition: wizchip_conf.h:210
PHYACR_WRITE
#define PHYACR_WRITE
Write _PHYDIR_ to the Ethernet PHY register specified by _PHYRAR_.
Definition: w6100.h:1973
PHYACR_READ
#define PHYACR_READ
Read a value from the Ethernet PHY register specified by _PHYRAR_. The read value can be checked by ...
Definition: w6100.h:1966
getSn_TX_FSR
datasize_t getSn_TX_FSR(uint8_t sn)
__WIZCHIP_T__::_IF::_BUS::_write_data_buf
void(* _write_data_buf)(uint32_t AddrSel, iodata_t *pBuf, datasize_t len, uint8_t addrinc)
Write iodata_t data as many as len to _WIZCHIP_ through BUS.
Definition: wizchip_conf.h:204
WIZCHIP_RXBUF_BLOCK
#define WIZCHIP_RXBUF_BLOCK(N)
SOCKETn Rx buffer address block.
Definition: w6100.h:55
__WIZCHIP_T__::_IF::BUS
struct __WIZCHIP_T__::_IF::_BUS BUS
The callback function of _WIZCHIP_IO_MODE_SPI_ such as _WIZCHIP_IO_MODE_SPI_VDM_ and _WIZCHIP_IO_MODE...
getPHYACR
#define getPHYACR()
Definition: w6100.h:3517
__WIZCHIP_T__::IF
union __WIZCHIP_T__::_IF IF
_Sn_RX_RSR_
#define _Sn_RX_RSR_(N)
SOCKETn RX Received Size Register Address [RO][0x0000].
Definition: w6100.h:1375
WIZCHIP_OFFSET_INC
#define WIZCHIP_OFFSET_INC(ADDR, N)
Increase offset address.
Definition: w6100.h:57
_W6100_SPI_READ_
#define _W6100_SPI_READ_
SPI interface Read operation in Control Phase.
Definition: w6100.h:49
wiz_send_data
void wiz_send_data(uint8_t sn, uint8_t *wizdata, datasize_t len)
It saves data to be sent in the SOCKETn TX buffer.
_W6100_SPI_WRITE_
#define _W6100_SPI_WRITE_
SPI interface Write operation in Control Phase.
Definition: w6100.h:50
getPHYDOR
#define getPHYDOR()
Definition: w6100.h:3511
wiz_recv_ignore
void wiz_recv_ignore(uint8_t sn, datasize_t len)
It discards the received data in the SOCKETn RX buffer.
__WIZCHIP_T__::_CS::_s_e_l_e_c_t_
void(* _s_e_l_e_c_t_)(void)
_WIZCHIP_ selected
Definition: wizchip_conf.h:191
__WIZCHIP_T__::_IF::_BUS::_read_data
iodata_t(* _read_data)(uint32_t AddrSel)
Read 1 iodata_t from _WIZCHIP_ through BUS.
Definition: wizchip_conf.h:201
__WIZCHIP_T__::_IF::_SPI::_read_byte_buf
void(* _read_byte_buf)(uint8_t *pBuf, datasize_t len)
Read byte data as many as len from _WIZCHIP_ through SPI.
Definition: wizchip_conf.h:212
__WIZCHIP_T__::CS
struct __WIZCHIP_T__::_CS CS
The set of interface IO callback function.
wiz_mdio_write
void wiz_mdio_write(uint8_t phyregaddr, uint16_t var)
Write data to the PHY via MDC/MDIO interface.
setPHYACR
#define setPHYACR(phyacr)
Definition: w6100.h:3514
_Sn_TX_FSR_
#define _Sn_TX_FSR_(N)
SOCKETn TX Free Buffer Size Register Address [RO][0x0800].
Definition: w6100.h:1315
IDM_DR
#define IDM_DR
Indirect Data Register.
Definition: w6100.h:63
WIZCHIP_READ
uint8_t WIZCHIP_READ(uint32_t AddrSel)
It reads 1 byte value from a register.
__WIZCHIP_T__::_IF::SPI
struct __WIZCHIP_T__::_IF::_SPI SPI
wiz_recv_data
void wiz_recv_data(uint8_t sn, uint8_t *wizdata, datasize_t len)
It reads the received data from the SOCKETn RX buffer and copies the data to your system memory speci...
w6100.h
W6100 HAL Header File.
IDM_AR0
#define IDM_AR0
Indirect High Address Register.
Definition: w6100.h:60
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